FIG. 1 is a schematic diagram of a known hysteretic power supply 10 for providing a regulated output voltage Vout to a load Z.
The power supply 10 includes n switching stages 12 (only one stage shown) and a hysteretic power-supply controller 14, which generates a respective switching signal PWM1−PWMn for each of the n switching stages.
Each switching stage 12 is coupled between an input supply voltage Vin and ground, and includes high-side and low-side switching transistors 18 and 20, an inverter 22, and a filter 24, which includes an inductor L and a capacitor C having an equivalent series resistance ESR. A stage 12 is “on” when the respective switching signal PWM has a high level such that the high-side transistor 18 conducts like a closed switch and the low-side transistor does not conduct like an open switch; conversely, a stage is “off” when the high-side transistor does not conduct and the low-side transistor conducts.
For n>1, the switching signals PWM1−PWMn each have the same frequency, but have a respective phase such that only one stage 12 is “on” at any given time. Also for n>1, the power supply 10 may include an optional current balancer 16 for equalizing the respective currents provided to the load Z by the n switching stages 12. An example of such a current balancer is described in U.S. 2005/0128005A1.
Where the power supply 10 includes the current balancer 16, then each switching stage 12 may include a current sensor 26, which provides to the current balancer 16 a respective BALANCE signal that indicates the amount of current that the switching stage is sourcing to the load Z.
FIG. 2A is a diagram of the regulated output Vout of FIG. 1 having a steady-state ripple component of frequency F (period T=1/F), and FIG. 2B is a diagram of the switching signal PWM1 of FIG. 1 also having the frequency F. It is understood that for n>1, PWM2−PWMn (not shown) are phase shifted relative to PWM1, but are otherwise the same (e.g., the same frequency and the same duty cycle) as PWM1.
Referring to FIGS. 1-2B, the operation of the power supply 10 is discussed.
At time t0, the power-supply controller 14 transitions PWM1 to a high level, and thus causes the high-side transistor 18 to close and the low-side transistor 20 to open.
The closed high-side transistor 18 causes a linearly increasing current to flow from the input supply voltage Vin, through the high-side transistor and the inductor L, and to the capacitor C and load Z.
The portion of this increasing current flowing through the ESR causes Vout to linearly increase—the increase in Vout due to the charging of the capacitor C is ignored for purposes of this discussion.
At time t1, Vout equals or exceeds a predetermined voltage threshold Voff, and, in response, the power-supply controller 14 transitions PWM1 to a low level, thus causing the high-side transistor 18 to open and the low-side transistor 20 to close.
The closed low-side transistor 20 allows a linearly decreasing current to flow from ground, through the low-side transistor and the inductor L, and to the capacitor C and load Z.
The portion of this decreasing current flowing through the ESR causes Vout to linearly decrease—again, the change in Vout due to the change in the voltage across the capacitor C is ignored.
When Vout equals or is less than a predetermined voltage threshold Von at time t2, then the power-supply controller 14 transitions PWM1 to a high level, and the above-described cycle repeats. Furthermore, although the slopes of the increasing and decreasing portions of the Vout ripple component are shown having the same magnitudes, these slopes may have different magnitudes depending on the load Z and the values of Vin, L, and C.
In the above-described manner, the power-supply controller 14 maintains the steady-state ripple component of Vout symmetric about a predetermined reference Vref, and thus maintains the steady-state average of Vout equal to Vref.
Still referring to FIGS. 1-2B, one may desire to select a switching frequency F for a given application of the hysteretic power supply 10. For example, one may desire to increase F so that he can decrease the sizes of L and/or C. Or, one may desire to increase F to reduce the amplitude of the Vout ripple component, or to meet RF emission requirements.
But unfortunately, it may be difficult or impossible to change the switching frequency F without redesigning the power supply 10. The switching frequency F has a “natural” value that depends, e.g., on the values of Vin, L, C, and Z (the “natural” value of F may also depend on the parasitic resistances, capacitances, and inductances associated with the circuit board on which the power supply 10 is disposed, and on the parasitic resistances in L and C (ESR)). That is, one typically cannot set F independently of Vin, L, C, and Z. Therefore, to change the switching frequency F to a desired value, a designer typically must change one or more of Vin, L, and C for a given Z, which typically has a value that is specified by a customer, and is thus unchangeable. But because the power-supply 10 uses feedback to regulate Vout, changing one or more of Vin, L, and C may change the frequency response of the power supply 10, and thus alter the supply's stability characteristics. Consequently, changing the switching frequency F may entail a relatively time-consuming redesign of the power supply 10 to insure that the supply has the desired frequency response and is not unstable.
Furthermore, a customer may desire to change the load Z without changing the switching frequency F or the values of Vin, L, and C.
But unfortunately, it may be difficult or impossible to change the load Z without changing the switching frequency F and the values of Vin, L, and C because F depends on Z as discussed above.
Referring to FIGS. 1-2A, another problem with the power supply 10 is that noise may cause jitter in the switching frequency F, and this jitter may generate RF emissions that interfere with the operation of the power supply, with the operation of other portions of a system in which the power supply is disposed, or with the operation of a device external to the system. Referring to FIG. 2A, the amplitude of the steady-state Vout ripple component may be relatively small, on the order of a few millivolts. Therefore, noise on Vout may randomly shift the points at which Vout crosses Voff and Von, thus causing jitter in the rising and falling edges of PWM1.